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Type: Bug
Resolution: Fixed
Priority: P2
Fix Version/s: 9
Affects Version/s: 8-aarch64, 9
Component/s: hotspot
Labels:
- openjdk

Subcomponent:
compiler
Resolved In Build:
b170
CPU:

aarch64
Verification:
Not verified

Issue	Fix Version	Assignee	Priority	Status	Resolution	Resolved In Build
JDK-8180484	10	Andrew Haley	P2	Resolved	Fixed	b09
JDK-8180536	9.0.4	Andrew Haley	P2	Resolved	Fixed	b01
JDK-8260802	openjdk8u292	Andrew Hughes	P2	Resolved	Fixed	b01
JDK-8297747	8u371	Fairoz Matte	P2	Closed	Fixed	b01

In C2 we use LDAR/STLR to handle volatile accesses, but in C1 and the interpreter we use separate DMB instructions and relaxed loads. When used together, these do not form a sequentially-consistent memory ordering. For example, if stores use STLR and loads use LDR;DMB a simple Dekker idiom will fail.

This is extremely hard to test because the loads and stores have to be in separately-compiled methods, but it is incorrect, and likely to fail in very weakly-ordered implementations.

backported by

JDK-8180484 AArch64: C1 and C2 volatile accesses are not sequentially consistent

Resolved

JDK-8180536 AArch64: C1 and C2 volatile accesses are not sequentially consistent

Resolved

JDK-8260802 AArch64: C1 and C2 volatile accesses are not sequentially consistent

Resolved

JDK-8297747 AArch64: C1 and C2 volatile accesses are not sequentially consistent

Closed

relates to

JDK-8241137 AArch64: Volatile accesses are not sequentially consistent with VM option "-XX:+UseBarriersForVolatile"

Closed

JDK-8365147 AArch64: Replace DMB + LD + DMB with LDAR for C1 volatile field loads

Open

JDK-8257192 Integrate AArch64 JIT port into 8u

Resolved

(2 relates to)

Assignee:: Andrew Haley
Reporter:: Andrew Haley
Votes:: 0 Vote for this issue
Watchers:: 9 Start watching this issue

Created:: 2017-05-09 07:44
Updated:: 2025-08-08 05:58
Resolved:: 2017-05-16 10:34

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