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  1. JDK
  2. JDK-4401779

sparc.ad, form3_mem_reg_long ignores ldd [r1+r2],r3 instruction form

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    • Icon: Bug Bug
    • Resolution: Fixed
    • Icon: P2 P2
    • 1.3.1
    • 2.0
    • hotspot
    • beta
    • sparc
    • solaris_7



        Name: cl74495 Date: 01/04/2001


        Using the Sparc Hotspot Server sources from
          hotspot_server-1_3_1-pre-beta-src-b12-solsparc-14_dec_2000.zip

        I am observing problems with the generated code for the
        Bytecodes::_laload bytecode , for compiled methods.

        The source of the problem appears to be in form3_mem_reg_long in sparc.ad ,
        which is always emitting the simm13 form of an ldd instruction,
        instead of also handling the ldd [r1+r2],r3 form .

        Below is some debugging output, followed by the suggested changes
        to sparc.ad in the "workaround" section of the bug report .
         I think the Op_StartI2C case may also need further fixes.

        For a Java method like this:

        private static void readObj3(long[] arr, int delta)
        {
          long val = arr[1000];
          long expected = 1300 + delta;
          if (val != expected))
            System.out.println("wrong value , expected" + expected + "got" + val );
        }

        I observe a bad ldd instruction for the arr[1000] access , like this:

        0xf9417818: ld [%i0 + 0xc], %l1 # load array length
        0xf941781c: sethi %hi(0x1c00), %l0
        0xf9417820: add %l0, 0x350, %l0 # 0x1c00 + 0x350 = 0x1f50 = 8016
        0xf9417824: cmp %l1, 0x3e8 # 0x3e8 == 1000
        0xf9417828: bleu,pn %icc,0xf94178a0
        0xf941782c: nop
        0xf9417830: add %i1, 0x514, %o3 # 0x514 == 1300 ; %i1 == delta
        0xf9417834: ldd [%i0], %l0 # BUG, SHOULD BE: ldd [%i0 + %l0], %l0


        Part of praph observed in parse2.cpp for Bytecodes::_laload, LoadLNode :
        (dbx) p n->dump(3)
         55 If <== 43 54 P=0.000001, C=-1.000000 <54725> Type:{0:control, 1:control}
         66 IfFalse <== 55 #0 <54736> Type:control
         4 Start <== 4 0 #{0:control, 1:abIO, 2:memory, 3:rawptr:BotPTR, 4:return_address, 5:long[int+]:BotPTR*, 6:int} <54674> Type:{0:control, 1:abIO, 2:memory, 3:rawptr:BotPTR, 4:return_address, 5:long[int+]:BotPTR*, 6:int}
         8 Parm <== 4 Memory <54678> Type:memory
         44 CastPP <== 43 12 <54714> Type:long[int+]:NotNull*
         73 ConI <== 0 <54743> Type:int:8016
         72 AddP <== _ 44 44 73 <54742> Type:long[int+]:NotNull*[2001]
         74 LoadL <== 66 8 72 <54744> Type:long


        Output from PrintOptoAssembly:

        000 B1: # B8 B2 <- BLOCK HEAD IS JUNK Freq: 0.000666667 Count: 0.000666667 IDom: 0/#2 RegPressure: 2 IHRP Index: 10 FRegPressure: 0 FHRP Index: 10
         AntiDep: 0 Blocker: 0
        000 --- MachPrologNode ----
        00c CMP R_I0,NULL ! ptr
        010 BPeq B8 # 0x0b0 P=0.000001 C=-1.000000
        018
        018 B2: # B7 B3 <- B1 Freq: 0.000666666 Count: -1 IDom: 1/#3 RegPressure: 4 IHRP Index: 8 FRegPressure: 0 FHRP Index: 8
         AntiDep: 0 Blocker: 0
        018 + LDUW [R_I0 + #12],R_L1 !range
        01c SET #8016,R_L0
        024 + CMP R_L1,#1000 ! unsigned
        028 BPule B7 # 0x0a0 P=0.000001 C=-1.000000
        030
        030 B3: # B5 B4 <- B2 Freq: 0.000666665 Count: -1 IDom: 2/#4 RegPressure: 7 IHRP Index: 8 FRegPressure: 0 FHRP Index: 8
         AntiDep: 0 Blocker: 0
        030 + ADD R_I1,#1300,R_O3
        034 LDD [R_I0 + R_L0],R_L0.lo ! long <<<<<< NOTE the LoadL instruction form


        Output from PrintCompilation, to get method start address
         38 b testasm::readObj3 (32 bytes)
        Compiled {method} methodOop=0xf7161b00 'readObj3' '([JI)V'
                  in 'testasm'^M
         main code [0xf9417800,0xf94178e0] = 224 # start address = 0xf9417800

        (dbx) px 0xf9417740 + 0x34
        4181817152U+52 = 0xf9417774 # address of the LoadL instruction

        (dbx) x 0xf9417774 / 1 i
        0xf9417774: ldd [%i0], %l0 # bad value emitted by sparc.ad
        (dbx) x 0xf9417774 / 1 X
        0xf9417774: 0xe01e2000 # bad value as hex

        (dbx) assign *(int*)0xf9417774 = 0xe01e0010 # encoding the correct instruction by hand
        (dbx) x 0xf9417774 / 1 i
        0xf9417774: ldd [%i0 + %l0], %l0
        (Review ID: 114564)
        ======================================================================

              cclicksunw Clifford Click (Inactive)
              clucasius Carlos Lucasius (Inactive)
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