On Solaris Sparc, atomic instruction sequences are generated
dynamically in order to choose the right variants between v8 and v9.
The current implementation assembles the appropriate sequence,
and then uses an indirect branch everywhere to actually perform
the atomic instruction. However, indirect branches can carry a significant
performance penalty, particularly on ultra2.

This penalty is most likely to be felt within parallel GCs, where
atomic instructions are executed frequently.

The "correct" solution is to assemble directly over the process' copy
of the text segment of the jvm, so that atomic instruction calls are
ordinary relatively addressed calls.

prefetching is related, since prefetch instructions are only legal for v9.
To farther complicate things, they degrade performance on ultra2, so a
different criteria is needed for turning prefetching on and off.
Prefetches were implemented in the atomic:: class in Ladybird, but
not with an indirect branch like the atomics. Because
of stability concerns, prefetchi instructions were generated
statically into the .so, using ELF surgery
to adjust the JVM to still run on v8. All uses of prefetching
were made conditional so that this code is never executed on a v8 system.
If prefetching is turned on/off using the same trick of writing directly
into the JVM text segment, this conditional code would not be necessary.