Details
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Bug
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Resolution: Fixed
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P3
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7
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b03
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sparc
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solaris_10
Backports
Issue | Fix Version | Assignee | Priority | Status | Resolution | Resolved In Build |
---|---|---|---|---|---|---|
JDK-2173406 | 7 | Sean Mullan | P4 | Resolved | Fixed | b68 |
Description
The CRL validation code should permit some clock skew when checking the validity
of CRLs. Currently, the system clock and the CRL server's clock have to be exactly synchronized or the validity check may fail if the system's clock is skewed such that it
is either before the CRL's this update field or after the CRL's next update field.
of CRLs. Currently, the system clock and the CRL server's clock have to be exactly synchronized or the validity check may fail if the system's clock is skewed such that it
is either before the CRL's this update field or after the CRL's next update field.
Attachments
Issue Links
- backported by
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JDK-2173406 CRL validation code should permit some clock skew when checking validity of CRLs
- Resolved
- relates to
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JDK-6744888 OCSP validation code should permit some clock skew when checking validity of OCSP responses
- Closed