| Issue | Fix Version | Assignee | Priority | Status | Resolution | Resolved In Build |
|---|---|---|---|---|---|---|
| JDK-2175676 | 7 | Tom Rodriguez | P3 | Closed | Fixed | b54 |
| JDK-2180564 | 6u18 | Tom Rodriguez | P3 | Resolved | Fixed | b01 |
When generating code for volatile memory accesses on x86 we currently use the mfence instruction if it is available and fall back to a lock:addl [esp], 0 when it's not. For the purposes of volatile synchronization they are equivalent in power but on some processors the mfence is more expensive so we should prefer the lock:addl idiom.
- backported by
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JDK-2180564 volatile fences should prefer lock:addl to actual mfence instructions
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- Resolved
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- Closed
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- relates to
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JDK-7078565 prefer mfence on processors prior to Nehalem
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- Closed
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