Recently it has become apparent that we need to modify the behaviour of the C1 & C2 JITs to cater for minor differences in implementations of the aarch64 architecture by different partners.

The proposed enhancement is to parse /proc/cpuinfo on Linux to obtain the necessary information. This information will consist of the following fields in class VM_Verion

int _cpu; // The cpu implementer from the following list
             // 'A' (ARM), 'B' (BROADCOM), 'C' (CAVIUM), 'D' (DEC), 'I' (INFINEON), 'M' (MOTOROLA)
             // 'N' (NVIDIA), 'P' (AMCC), 'Q' (QUALCOM), 'V' (MARVELL), 'i' (INTEL)
int _model; // The implementer part number 0..4095
int _variant; // The implementer variant 0..255
int _revision; // The implmenter revision 0..255

This information is derived directly from MIDR_EL1. Unfortunately this register is not readable at EL0 so we will derive the same information from /proc/cpuinfo as follows:-

CPU implementer : 0x43
CPU architecture: AArch64
CPU variant : 0x0
CPU part : 0x0a1
CPU revision : 0

I have an initial patch for this which I will post for review shortly.