Currently, C2 compiler generate independent stores to clear short arrays whose size is no bigger than parameter InitArrayShortSize (refer to ClearArrayNode::Ideal function). For the aarch64 port, we have store pair instruction which can zero two memory words at a time and this will be good for code size and maybe performance for some micro-archs.

Example C2 JIT code snippet:

  0x0000007fa85c03a8: cmp x11, x10
  0x0000007fa85c03ac: b.cs 0x0000007fa85c0474
  0x0000007fa85c03b0: orr x10, xzr, #0x1
  0x0000007fa85c03b4: str x11, [x28,#96]
  0x0000007fa85c03b8: str x10, [x12]
  0x0000007fa85c03bc: mov x10, #0x10000 // #65536
                                                ; {metadata('java/lang/Object'[])}
  0x0000007fa85c03c0: movk x10, #0x1080
  0x0000007fa85c03c4: str w10, [x12,#8]
  0x0000007fa85c03c8: str w2, [x12,#12]
  0x0000007fa85c03cc: str xzr, [x12,#16]
  0x0000007fa85c03d0: str xzr, [x12,#24]
  0x0000007fa85c03d4: str xzr, [x12,#32]
  0x0000007fa85c03d8: str xzr, [x12,#40]
  0x0000007fa85c03dc: str xzr, [x12,#48]
  0x0000007fa85c03e0: prfm pstl1keep, [x11,#256]
  0x0000007fa85c03e4: str xzr, [x12,#56]
  0x0000007fa85c03e8: prfm pstl1keep, [x11,#320]
  0x0000007fa85c03ec: str xzr, [x12,#64]
  0x0000007fa85c03f0: prfm pstl1keep, [x11,#384]
  0x0000007fa85c03f4: str xzr, [x12,#72]
  0x0000007fa85c03f8: dmb ishst ;*anewarray
                                                ; - scala.collection.mutable.ResizableArray$class::$init$@14 (line 32)
                                                ; - scala.collection.mutable.ArrayBuffer::<init>@34 (line 47)
                                                ; - scala.collection.mutable.ArrayBuffer::<init>@3 (line 62)
                                                ; - scala.collection.mutable.ArrayBuffer$::newBuilder@4 (line 189)
                                                ; - scala.collection.generic.GenericTraversableTemplate$class::genericBuilder@6 (line 69)
                                                ; - scala.collection.AbstractTraversable::genericBuilder@1 (line 105)