P4 Description
On AIX, we should use 64K pages for the data segment.
Background:
AIX supports multiple page sizes for different memory regions: text segment, data segment, System V shm, mmap, primary thread stack...
(For details, see https://www.ibm.com/support/knowledgecenter/en/ssw_aix_61/com.ibm.aix.performance/multiple_page_size_support.htm)
These page sizes can be controlled in part by ld command line options, in part by the environment variable LDR_CNTRL.
But since the generic OpenJDK code base considers the page size a global thing (with the exception of "large pages", which closely follos the model of Linux large pages: something special and different from the standard page size and which is in general pinned into memory) it does not fit easily a model where memory ranges have different page sizes (e.g. 64K paged java heap and 4K paged thread stacks.)
That is why in the AIX port, we mimick to the upper VM layers a platform which only knows one page size (4K or 64K). There are tight restrictions though: We can pretend 4K paged memory is really 64K paged (as AIX has commit-on-touch this works) but not the other way around.
So, the VM might run with os::vm_page_size() == 64K, but parts of the memory may still be 4K paged. Until now this was true of the data segment, from which C-Heap and Posix thread stacks are allocated.
While this works, it is not terribly effective, especially in regards to thread stacks. If we pretend to have 64K paged stacks, it would be better to actually have real 64K paged stacks and get the benefit of larger pages.
Note that even if we change the ld options to always run by default with 64K paged data segment, this setting may be overwritten from the outside using the LDR_CNTRL environment variable, so we should still be able to cope with 4K paged data segments like we did before.
Background:
AIX supports multiple page sizes for different memory regions: text segment, data segment, System V shm, mmap, primary thread stack...
(For details, see https://www.ibm.com/support/knowledgecenter/en/ssw_aix_61/com.ibm.aix.performance/multiple_page_size_support.htm)
These page sizes can be controlled in part by ld command line options, in part by the environment variable LDR_CNTRL.
But since the generic OpenJDK code base considers the page size a global thing (with the exception of "large pages", which closely follos the model of Linux large pages: something special and different from the standard page size and which is in general pinned into memory) it does not fit easily a model where memory ranges have different page sizes (e.g. 64K paged java heap and 4K paged thread stacks.)
That is why in the AIX port, we mimick to the upper VM layers a platform which only knows one page size (4K or 64K). There are tight restrictions though: We can pretend 4K paged memory is really 64K paged (as AIX has commit-on-touch this works) but not the other way around.
So, the VM might run with os::vm_page_size() == 64K, but parts of the memory may still be 4K paged. Until now this was true of the data segment, from which C-Heap and Posix thread stacks are allocated.
While this works, it is not terribly effective, especially in regards to thread stacks. If we pretend to have 64K paged stacks, it would be better to actually have real 64K paged stacks and get the benefit of larger pages.
Note that even if we change the ld options to always run by default with 64K paged data segment, this setting may be overwritten from the outside using the LDR_CNTRL environment variable, so we should still be able to cope with 4K paged data segments like we did before.