AARCH64: SIMD shift instructions are incorrectly encoded

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    • Type: Bug
    • Resolution: Fixed
    • Priority: P3
    • 11
    • Affects Version/s: 10
    • Component/s: hotspot
    • b01
    • aarch64

      SIMD shift instructions: shl, sshr, ushr are incorrectly encoded. Shift bits are currently directly written into bitfield. However, according to spec, it should be
      "<type-dependent-constant> - UInt(immh:immb)" for right shifts and UInt(immh:immb) - "<type-dependent-constant>" for left shift.

      These instructions are not used in current codebase, so, this problem wasn't found earlier.

            Assignee:
            Dmitrij Pochepko
            Reporter:
            Dmitrij Pochepko
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              Created:
              Updated:
              Resolved: