-
Bug
-
Resolution: Fixed
-
P2
-
9, 10
-
Intel Celeron J3455, J3355, N3450 and N3350
-
b39
-
x86_64
-
Verified
Issue | Fix Version | Assignee | Priority | Status | Resolution | Resolved In Build |
---|---|---|---|---|---|---|
JDK-8194699 | 11 | Tobias Hartmann | P2 | Resolved | Fixed | b01 |
JDK-8194797 | 10.0.1 | Tobias Hartmann | P2 | Resolved | Fixed | b01 |
See: http://mail.openjdk.java.net/pipermail/hotspot-compiler-dev/2018-January/028002.html
# A fatal error has been detected by the Java Runtime Environment:
#
# SIGILL (0x4) at pc=0x00007fae6f67c0b4, pid=16238, tid=16239
Stack: [0x00007fae8f6b8000,0x00007fae8f7b8000], sp=0x00007fae8f7b6940,
free space=1018k
Native frames: (J=compiled Java code, A=aot compiled Java code, j=interpreted, Vv=VM code, C=native code)
v ~StubRoutines::sha512_implCompress J 171% c2 zzz.main([Ljava/lang/String;)V (96 bytes) @ 0x00007fae770f3689 [0x00007fae770f34a0+0x00000000000001e9]
v ~StubRoutines::call_stub
V [libjvm.so+0x7dc059]
V [libjvm.so+0x7ff420]
V [libjvm.so+0x801cb1]
C [libjli.so+0x4b20]
C [libjli.so+0x89ad]
C [libpthread.so.0+0x7519] start_thread+0xd9
The problem seems to be that the processor does not support AVX 2 instructions but the SHA-512 stub uses them. The instruction at the failing address is:
0x00007fae6f67c0b4: vpblendd(xmm0, xmm0, xmm1, 0xF0, AVX_128bit)
Looking at the specification for the Intel Celeron J3455 [1], AVX 2 is not supported. I think the problem is that the stub is only guarded by UseSHA and since the CPU does support SHA, the stub is emitted without checking for AVX 2
support.
This code was introduced in JDK 9 byJDK-8165381.
# A fatal error has been detected by the Java Runtime Environment:
#
# SIGILL (0x4) at pc=0x00007fae6f67c0b4, pid=16238, tid=16239
Stack: [0x00007fae8f6b8000,0x00007fae8f7b8000], sp=0x00007fae8f7b6940,
free space=1018k
Native frames: (J=compiled Java code, A=aot compiled Java code, j=interpreted, Vv=VM code, C=native code)
v ~StubRoutines::sha512_implCompress J 171% c2 zzz.main([Ljava/lang/String;)V (96 bytes) @ 0x00007fae770f3689 [0x00007fae770f34a0+0x00000000000001e9]
v ~StubRoutines::call_stub
V [libjvm.so+0x7dc059]
V [libjvm.so+0x7ff420]
V [libjvm.so+0x801cb1]
C [libjli.so+0x4b20]
C [libjli.so+0x89ad]
C [libpthread.so.0+0x7519] start_thread+0xd9
The problem seems to be that the processor does not support AVX 2 instructions but the SHA-512 stub uses them. The instruction at the failing address is:
0x00007fae6f67c0b4: vpblendd(xmm0, xmm0, xmm1, 0xF0, AVX_128bit)
Looking at the specification for the Intel Celeron J3455 [1], AVX 2 is not supported. I think the problem is that the stub is only guarded by UseSHA and since the CPU does support SHA, the stub is emitted without checking for AVX 2
support.
This code was introduced in JDK 9 by
- backported by
-
JDK-8194699 SHA-512 stub uses AVX 2 instructions on non-supporting CPUs
-
- Resolved
-
-
JDK-8194797 SHA-512 stub uses AVX 2 instructions on non-supporting CPUs
-
- Resolved
-
- relates to
-
JDK-8165381 Update for x86 SHA512 using AVX2
-
- Resolved
-
-
JDK-8211061 Tests fail with assert(VM_Version::supports_sse4_1()) on ThreadRipper CPU
-
- Resolved
-