Future Intel architecture will be supporting vectorized carry less multiplication: https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
This work is done for crc32 intrinsic.
Code contributed by: srukmannagar( shravya.rukmannagari@intel.com) and Smita Kamath(smita.kamath@intel.com)