| Issue | Fix Version | Assignee | Priority | Status | Resolution | Resolved In Build |
|---|---|---|---|---|---|---|
| JDK-8205762 | 11.0.1 | Dmitrij Pochepko | P3 | Resolved | Fixed | team |
push_call_clobbered_registers, pop_call_clobbered_registers, push_CPU_state, pop_CPU_state methods are using 2-fpu-registers-per-instruction approach, while it can use 4-fpu-registers-per-instruction, which will make respective code up to 2 times shorter
- backported by
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JDK-8205762 AARCH64: optimize FPU load and stores in macroAssembler
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- Resolved
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