AARCH64: optimize FPU loads and stores in C1_Runtime1_aarch64.cpp

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    • Type: Enhancement
    • Resolution: Fixed
    • Priority: P3
    • 11
    • Affects Version/s: 11
    • Component/s: hotspot
    • b20
    • aarch64

        save_live_registers(...), restore_live_registers(...) and restore_live_registers_except_r0(...) are using ldp/stp (pair of registers) for FPU registers, where it can be ld1/st1, which use 4 registers per instruction

              Assignee:
              Dmitrij Pochepko
              Reporter:
              Dmitrij Pochepko
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                Created:
                Updated:
                Resolved: