AArch64: Incorrect mapping between OptoReg and VMReg for high 64 bits of Vector Register

In register definition of aarch64.ad, each vector register is defined as 4 slots with its calling convention, ideal type, ... and its VMReg value. These VMReg values in reg_def are used by ADLC to generate mapping between OptoReg and VMReg: opto2vm[].

But VMReg is treated as 2 slots inconsistently for vector register. This causes incorrect mapping between VMReg and OptoReg for high 64 bits of vector register.