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Enhancement
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Resolution: Fixed
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P4
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8, 11, 14
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b12
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x86_64
Intel released an erratum about conditional branches crossing 32 bit boundaries. It is described here:
https://www.intel.com/content/dam/support/us/en/documents/processors/mitigations-jump-conditional-code-erratum.pdf
It seems like microcode updates will prevent such branches from being cached, and sensitive branches might want to be aligned properly. So in ZGC we should align our fast path check.
We should also sort out the mach IR of C2 to be reasonably well aligned.
https://www.intel.com/content/dam/support/us/en/documents/processors/mitigations-jump-conditional-code-erratum.pdf
It seems like microcode updates will prevent such branches from being cached, and sensitive branches might want to be aligned properly. So in ZGC we should align our fast path check.
We should also sort out the mach IR of C2 to be reasonably well aligned.
- relates to
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- Resolved
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- Resolved
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- Resolved
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JDK-8274325 C4819 warning at vm_version_x86.cpp on Windows after JDK-8234160
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- Resolved
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- Resolved
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