In the current implementation, the check if concurrent marking is active is created with AliasIdxRaw so it won't get reordered with other memory accesses (G1 and Shenadoah).
The flag which indicates if concurrent marking is active can only change at safepoints.
So the load could be pinned to the dominating safepoint if it exists (otherwise to where control flow from several safepoints merges or top if there's no safepoint).
This may enable optimizations.

In case of G1 see G1BarrierSetC2::pre_barrier:
Node* marking = __ load(__ ctrl(), marking_adr, TypeInt::INT, active_type, Compile::AliasIdxRaw);