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Bug
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Resolution: Fixed
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P3
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11, 14, 15
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b32
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x86
Issue | Fix Version | Assignee | Priority | Status | Resolution | Resolved In Build |
---|---|---|---|---|---|---|
JDK-8237228 | 15 | Sandhya Viswanathan | P3 | Resolved | Fixed | b06 |
JDK-8237431 | 14.0.1 | Unassigned | P3 | Resolved | Fixed | b01 |
JDK-8253924 | 11.0.10-oracle | Sandhya Viswanathan | P3 | Resolved | Fixed | b01 |
JDK-8254066 | 11.0.10 | Sandhya Viswanathan | P3 | Resolved | Fixed | b01 |
Currently legVecZ operand is defined as follows:
operand legVecZ() %{
constraint(ALLOC_IN_RC(vectorz_reg_vl));
match(VecZ);
format %{ %}
interface(REG_INTER);
%}
This allows legVecZ to be zmm0-zmm31 on platforms supporting AVX 512 vl.
The legVecZ should instead be defined as:
operand legVecZ() %{
constraint(ALLOC_IN_RC(vectorz_reg_legacy));
match(VecZ);
format %{ %}
interface(REG_INTER);
%}
operand legVecZ() %{
constraint(ALLOC_IN_RC(vectorz_reg_vl));
match(VecZ);
format %{ %}
interface(REG_INTER);
%}
This allows legVecZ to be zmm0-zmm31 on platforms supporting AVX 512 vl.
The legVecZ should instead be defined as:
operand legVecZ() %{
constraint(ALLOC_IN_RC(vectorz_reg_legacy));
match(VecZ);
format %{ %}
interface(REG_INTER);
%}
- backported by
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JDK-8237228 The legVecZ operand should be limited to zmm0-zmm15 registers
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- Resolved
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JDK-8237431 The legVecZ operand should be limited to zmm0-zmm15 registers
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- Resolved
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JDK-8253924 The legVecZ operand should be limited to zmm0-zmm15 registers
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- Resolved
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JDK-8254066 The legVecZ operand should be limited to zmm0-zmm15 registers
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- Resolved
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- relates to
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JDK-8236507 Long512VectorTests Failure on CLX
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- Resolved
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