"The original instruction used should be dcps1 instead of dpcs1 - there's a misspelling in AArch64 assembler. " -- Pengfei Li

reference:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802b/DCPS1A32.html

grep "dpcs" -Ri hotspot/
hotspot/cpu/aarch64/aarch64-asmtest.py:generate (ImmOp, ["svc", "hvc", "smc", "brk", "hlt", # "dpcs1", "dpcs2", "dpcs3"
hotspot/cpu/aarch64/assembler_aarch64.hpp: INSN(dpcs1, 0b101, 0, 0b01);
hotspot/cpu/aarch64/assembler_aarch64.hpp: INSN(dpcs2, 0b101, 0, 0b10);
hotspot/cpu/aarch64/assembler_aarch64.hpp: INSN(dpcs3, 0b101, 0, 0b11);
hotspot/cpu/aarch64/aarch64.ad: __ dpcs1(0xdead + 1);