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Enhancement
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Resolution: Fixed
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P4
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11, 16
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b18
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aarch64
| Issue | Fix Version | Assignee | Priority | Status | Resolution | Resolved In Build |
|---|---|---|---|---|---|---|
| JDK-8268603 | 11.0.13 | Dmitry Chuyko | P4 | Resolved | Fixed | b01 |
Currently all Floating-Point and SIMD Registers are defined as SOC registers in c calling convention on AArch64.
As AArch64 ABI tells, the bottom 64 bits of v8-v15 are callee-saved.
Aligns save-policy in c calling convention with AArch64 ABI could help eliminate unnecessary SOE registers spilling in caller across CallLeafNode.
As AArch64 ABI tells, the bottom 64 bits of v8-v15 are callee-saved.
Aligns save-policy in c calling convention with AArch64 ABI could help eliminate unnecessary SOE registers spilling in caller across CallLeafNode.
- backported by
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JDK-8268603 AArch64: When CallLeaf, no need to preserve callee-saved registers in caller
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- Resolved
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