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Enhancement
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Resolution: Fixed
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P4
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17
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b05
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aarch64
For instace: in the implentation of VectorMaskCmp & VectorStoreMask :
$jtreg -vmoptions:"-XX:+PrintAssembly" ./Int128VectorTests.java
before fixing
-----------------
0dc ldrq V17,[R10, #16] # vector (128 bits)
0e0 cmeq V16, V16, V17 # vector cmp (4I)
0e4 xtn V16, V16 # 4S to 4H
xtn V16, V16 # 4H to 4B
negr V16, V16 # store mask (4S to 4B)
-----------------
Hereļ¼ the output lacks data type qualifiers like T4S in `cmeq V16, V16, V17`.
Expect:
-----------------
0dc ldrq V16,[R10, #16] # vector (128 bits)
0e0 cmeq V16, T4S, V16, V18 # vector cmp (4I)
0e4 xtn V16, T4H, V16, T4S # 4S to 4H
xtn V16, T8B, V16, T8H # 4H to 4B
negr V16, T8B, V16 # store mask (4S to 4B)
-----------------
$jtreg -vmoptions:"-XX:+PrintAssembly" ./Int128VectorTests.java
before fixing
-----------------
0dc ldrq V17,[R10, #16] # vector (128 bits)
0e0 cmeq V16, V16, V17 # vector cmp (4I)
0e4 xtn V16, V16 # 4S to 4H
xtn V16, V16 # 4H to 4B
negr V16, V16 # store mask (4S to 4B)
-----------------
Hereļ¼ the output lacks data type qualifiers like T4S in `cmeq V16, V16, V17`.
Expect:
-----------------
0dc ldrq V16,[R10, #16] # vector (128 bits)
0e0 cmeq V16, T4S, V16, V18 # vector cmp (4I)
0e4 xtn V16, T4H, V16, T4S # 4S to 4H
xtn V16, T8B, V16, T8H # 4H to 4B
negr V16, T8B, V16 # store mask (4S to 4B)
-----------------