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  1. JDK
  2. JDK-8260899

ARM32: SyncOnValueBasedClassTest fails with assert(is_valid()) failed: invalid register

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Details

    • Bug
    • Resolution: Fixed
    • P4
    • 17
    • 16, 17
    • hotspot
    • b09

    Description

      $ CONF=linux-arm-server-fastdebug make run-test TEST=runtime/Monitor/SyncOnValueBasedClassTest.java
      ...

      # Internal Error (/home/pi/jdk/src/hotspot/cpu/arm/register_arm.hpp:155), pid=3793, tid=3808
      # assert(is_valid()) failed: invalid register
      #
      # JRE version: OpenJDK Runtime Environment (17.0) (fastdebug build 17-internal+0-adhoc.pi.jdk)
      # Java VM: OpenJDK Server VM (fastdebug 17-internal+0-adhoc.pi.jdk, compiled mode, emulated-client, g1 gc, linux-arm)
      # Problematic frame:
      # V [libjvm.so+0xe1a6a8] MacroAssembler::load_klass(RegisterImpl*, RegisterImpl*, AsmCondition)+0xa4

      Current CompileTask:
      C1: 318 2 !b java.lang.Class::desiredAssertionStatus (54 bytes)

      Stack: [0x72580000,0x72600000], sp=0x725fe170, free space=504k
      Native frames: (J=compiled Java code, A=aot compiled Java code, j=interpreted, Vv=VM code, C=native code)
      V [libjvm.so+0xe1a6a8] MacroAssembler::load_klass(RegisterImpl*, RegisterImpl*, AsmCondition)+0xa4
      V [libjvm.so+0x43b6b4] C1_MacroAssembler::lock_object(RegisterImpl*, RegisterImpl*, RegisterImpl*, RegisterImpl*, Label&)+0xcf8
      V [libjvm.so+0x3d731c] LIR_Assembler::emit_lock(LIR_OpLock*)+0x160
      V [libjvm.so+0x3b1a00] LIR_OpLock::emit_code(LIR_Assembler*)+0x1c
      V [libjvm.so+0x3c3624] LIR_Assembler::emit_lir_list(LIR_List*)+0xf0
      V [libjvm.so+0x3c3c08] LIR_Assembler::emit_block(BlockBegin*)+0x98
      V [libjvm.so+0x3c3e0c] LIR_Assembler::emit_code(BlockList*)+0x74
      V [libjvm.so+0x363e9c] Compilation::emit_code_body()+0x130
      V [libjvm.so+0x3646c8] Compilation::compile_java_method()+0x5e0
      V [libjvm.so+0x365278] Compilation::compile_method()+0x1ec


      The problem is in this code:

        if (DiagnoseSyncOnValueBasedClasses != 0) {
          load_klass(tmp1, obj);
          ldr_u32(tmp1, Address(tmp1, Klass::access_flags_offset()));
          tst(tmp1, JVM_ACC_IS_VALUE_BASED_CLASS);
          b(slow_case, ne);
        }

      tmp1 is noreg when !BiasedLocking, because c1_LIRGenerator_arm.cpp provides it only when UseBiasedLocking is enabled.

      void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
        ...
        // Need a scratch register for biased locking on arm
        LIR_Opr scratch = LIR_OprFact::illegalOpr;
        if(UseBiasedLocking) {
          scratch = new_pointer_register();
        } else {
          scratch = atomicLockOpr(); // <--- actually illegalOpr
        }

        ...

        monitor_enter(obj.result(), lock, hdr, scratch,
                      x->monitor_no(), info_for_exception, info);
      }

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              shade Aleksey Shipilev
              shade Aleksey Shipilev
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                Created:
                Updated:
                Resolved: