NegI/LNode have been defined but not been used. Currently, the 'ineg' and 'lneg' bytecodes were implemented by a SubI/LNode.

At this moment only x86_64 implemented NegI/LNode in backend, but actually these rules could not be matched since the node is *not* generated at all.

By enabling NegINode and NegLNode, lots of backend rules could be simplified. E.g.
"SubI zero src" could be simplified to "NegI src"

$> jdk_src/src/hotspot/cpu$ grep -Hnr "(SubI zero"
aarch64/aarch64.ad.orig:10689: match(Set dst (SubI zero src));
aarch64/aarch64.ad.orig:10820: match(Set dst (MulI (SubI zero src1) src2));
aarch64/aarch64.ad.orig:10821: match(Set dst (MulI src1 (SubI zero src2)));
aarch64/aarch64.ad:10728: match(Set dst (SubI zero src));
aarch64/aarch64.ad:10859: match(Set dst (MulI (SubI zero src1) src2));
aarch64/aarch64.ad:10860: match(Set dst (MulI src1 (SubI zero src2)));
ppc/ppc.ad:8651: match(Set dst (SubI zero src2));
x86/x86_32.ad:7458: match(Set dst (AddP dst (SubI zero src)));
x86/x86_32.ad:7469: match(Set dst (SubI zero dst));
x86/x86_32.ad:8385: match(Set dst ( OrI (LShiftI dst shift) (URShiftI dst (SubI zero shift))));
x86/x86_32.ad:8451: match(Set dst ( OrI (URShiftI dst shift) (LShiftI dst (SubI zero shift))));
x86/x86_64.ad:8110: match(Set dst (AddP dst (SubI zero src)));
x86/x86_64.ad:8121: match(Set dst (SubI zero dst));
x86/x86_64.ad:8144: match(Set dst (StoreI dst (SubI zero (LoadI dst))));
s390/s390.ad:6265: match(Set dst (SubI zero src));
s390/s390.ad:8994: match(Set dst (SubI zero (AbsI src)));