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Type: Enhancement
Resolution: Fixed
Priority: P4
Fix Version/s: 18
Affects Version/s: 11, 17, 18
Component/s: hotspot
Labels:

Subcomponent:
compiler
Resolved In Build:
b17
CPU:

aarch64

Issue	Fix Version	Assignee	Priority	Status	Resolution	Resolved In Build
JDK-8277684	17.0.3-oracle	Andrew Haley	P4	Resolved	Fixed	b01
JDK-8277384	17.0.2	Andrew Haley	P4	Resolved	Fixed	b06
JDK-8288004	11.0.17-oracle	Tobias Hartmann	P4	Resolved	Fixed	b01
JDK-8277800	11.0.14	Andrew Haley	P4	Resolved	Fixed	b05

Given that some AArch64 implementations can issue 2-4 AESE or AESMC instructions per clock cycle, and that these instructions have a latency of 2-3 clocks, we should be able to at least double the speed of AES on Aarch64 by interleaving 2-4 AES encryptions.

backported by

JDK-8277384 AArch64: AES Galois CounterMode (GCM) interleaved implementation using vector instructions

Resolved

JDK-8277684 AArch64: AES Galois CounterMode (GCM) interleaved implementation using vector instructions

Resolved

JDK-8277800 AArch64: AES Galois CounterMode (GCM) interleaved implementation using vector instructions

Resolved

JDK-8288004 AArch64: AES Galois CounterMode (GCM) interleaved implementation using vector instructions

Resolved

duplicates

JDK-8267993 [aarch64] Implement intrinsic for CounterMode::implCrypt()

Closed

links to

Commit openjdk/jdk11u-dev/b3ef0ea7

Commit openjdk/jdk17u/076941f2

Commit openjdk/jdk/4f3b626a

Review openjdk/jdk11u-dev/410

Review openjdk/jdk17u/87

Review openjdk/jdk17u/216

Review openjdk/jdk/5390

(7 links to)

Assignee:: Andrew Haley

Reporter:: Andrew Haley

Votes:: 0 Vote for this issue

Watchers:: 7 Start watching this issue

Created:: 2021-07-30 08:29

Updated:: 2022-06-09 05:57

Resolved:: 2021-09-23 02:03

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