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  1. JDK
  2. JDK-8278033

riscv: Fix MacroAssembler::atomic_incw: store condition instruction has wrong operand order

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    • Icon: Bug Bug
    • Resolution: Fixed
    • Icon: P4 P4
    • repo-riscv-port
    • repo-riscv-port
    • hotspot
    • None
    • riscv
    • linux

      This is a trivial fix for this typo. This could reproduce before JDK18 by using `-XX:+PrintBiasedLockingStatistics`; however, after the removal of BiasedLocking, this function has no usage now. But we might fix it as well for future usage since it is a quite fundamental function.

            xlinzheng Xiaolin Zheng
            xlinzheng Xiaolin Zheng
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