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Enhancement
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Resolution: Fixed
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P4
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11, 17, 18, 19
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b11
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aarch64
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generic
Issue | Fix Version | Assignee | Priority | Status | Resolution | Resolved In Build |
---|---|---|---|---|---|---|
JDK-8294124 | 17.0.6-oracle | Tobias Hartmann | P4 | Resolved | Fixed | b01 |
JDK-8293866 | 17.0.6 | Dmitry Chuyko | P4 | Resolved | Fixed | b01 |
In case non-volatile zero byte, char, int, long or pointer is stored C2 generates code like
str xzr, [x21, #24]
There are appropriate rules and encodings for that in aarch64.ad like
storeimmB0() and aarch64_enc_strb0().
For volatiles there are no such rules for 0 while all the rest is similar. Current code is like:
mov x13, xzr
stlr x13, [x11]
One register can be saved and 1 instruction instead of 2 can be used:
stlr xzr [x11]
str xzr, [x21, #24]
There are appropriate rules and encodings for that in aarch64.ad like
storeimmB0() and aarch64_enc_strb0().
For volatiles there are no such rules for 0 while all the rest is similar. Current code is like:
mov x13, xzr
stlr x13, [x11]
One register can be saved and 1 instruction instead of 2 can be used:
stlr xzr [x11]
- backported by
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JDK-8293866 AArch64: Use ZR for integer zero immediate volatile stores
- Resolved
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JDK-8294124 AArch64: Use ZR for integer zero immediate volatile stores
- Resolved
- links to
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Commit openjdk/jdk17u-dev/46f94adb
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Commit openjdk/jdk/413bef68
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Review openjdk/jdk17u-dev/664
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Review openjdk/jdk/7515
(1 links to)