In current C2 SLP, vectorization of unsigned shift right on signed subword types (byte, short) is intentionally disabled because the difference of unsigned shift behavior between the Java spec and AArch64 SIMD instructions. But in some cases where the shift amount is a constant and not larger than the amount of higher bits to be extended, the unsigned shift can be transformed into a signed shift and hence becomes vectorizable. We could consider introducing this optimization to benefit more cases.

Testcase:
public short[] vectorUnsignedShiftRight() {
    short[] res = new short[SIZE];
    for (int i = 0; i < SIZE; i++) {
        res[i] = (short) (shorts2[i] >>> 3);
    }
    return res;
}