riscv: Clean up stack and register handling in interpreter

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    • Type: Enhancement
    • Resolution: Fixed
    • Priority: P4
    • 20
    • Affects Version/s: 20
    • Component/s: hotspot
    • 20
    • b07
    • riscv
    • linux

      As JDK-8288971 described, we have the same issue on riscv backend:

      1. We use x30 to pass the caller's SP to a callee through adapters. x30 is not a callee-saved register in native ABI [1], we choose x19 for this purpose.
      2. We frequently recalculate the location where the native SP needs to go. We have a spare slot in the interpreter frame, so we should calculate it once, when the frame is created, and use it.
      3. Relate to 1, we should clearly label all the places where the caller's SP is passed to a callee.

      1. https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc

            Assignee:
            Feilong Jiang
            Reporter:
            Feilong Jiang
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              Created:
              Updated:
              Resolved: