The riscv port tier1 failed after JDK-8290025,after which GC took over the work of code cache sweeping.
Then, concurrent GC like ZGC or Shenandoah failed at the unimplemented BarreirSetNMethod::arm(), and meanwhile, it exposed a long-stand bug in G1BarrierSetAssembler::g1_write_barrier_pre().
Considering we are at the same time to rewrite the nmethod entry barrier when porting loom and generational ZGC in riscv port, we solve them together in this issue to make things smooth.
LikeJDK-8290700, we brought the similar optimization to the nmethod entry barrier, and introduced a out-of-line stub to the entry barriers of C2 methods, and also a concurrent-data-and instruction-patching barrier.
Then, concurrent GC like ZGC or Shenandoah failed at the unimplemented BarreirSetNMethod::arm(), and meanwhile, it exposed a long-stand bug in G1BarrierSetAssembler::g1_write_barrier_pre().
Considering we are at the same time to rewrite the nmethod entry barrier when porting loom and generational ZGC in riscv port, we solve them together in this issue to make things smooth.
Like
- relates to
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JDK-8293065 Zero build failure on AArch64 and RISCV64 after JDK-8293007
- Resolved