Similarly to AArch64 DC.ZVA, the RISC-V Zicboz [1] extension provides the cbo.zero [2] instruction that allows to zero out memory a cache-line at a time. This should be faster than storing zeroes 64bits at a time.
[1] https://github.com/riscv/riscv-CMOs
[2] https://github.com/riscv/riscv-CMOs/blob/master/cmobase/Zicboz.adoc#insns-cbo_zero
[1] https://github.com/riscv/riscv-CMOs
[2] https://github.com/riscv/riscv-CMOs/blob/master/cmobase/Zicboz.adoc#insns-cbo_zero
- duplicates
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JDK-8299821 RISC-V: Optimize zero_blocks and zero_words stubs
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- Closed
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