RISC-V: C2: Use single-bit instructions from the Zbs extension

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    • Type: Enhancement
    • Resolution: Fixed
    • Priority: P4
    • 20
    • Affects Version/s: 20
    • Component/s: hotspot
    • None
    • b27
    • riscv
    • linux

        The single-bit instructions from the Zbs extension provide a mechanism to set, clear, invert, or extract a single bit in a register. The bit is specified by its index.

        Especially, the single-bit extract (immediate) instruction 'bexti rd, rs1, shamt' performs this operation:

        ```
          let index = shamt & (XLEN - 1);
          X(rd) = (X(rs1) >> index) & 1;
        ```

        This instruction could be used to match for following sub-graph in C2 where integer immediate 'mask' is power of 2:
        '''
           Set dst (Conv2B (AndI src mask))
        '''

              Assignee:
              Fei Yang
              Reporter:
              Fei Yang
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                Created:
                Updated:
                Resolved: