RISC-V: Handle special cases for MinI/MaxI nodes for Zbb

The code generation for MinI/MaxI nodes for Zbb could be improved when one of the source operands is constant 0. We can make use of the dedicated zero register of the architecture for these special cases.

The difference in -XX:+PrintOptoAssembly output looks like:

Before:
```
048 li R7, #0 # int, #@loadConI
04a + max R10, R12, R7 #@maxI_reg_b
04e # pop frame 32
```

After:
```
048 max R10, R12, zr #@maxI_reg_zero_b
04c # pop frame 32
```

Before:
```
028 li R7, #0 # int, #@loadConI
02a + min R10, R11, R7 #@minI_reg_b
02e # pop frame 32
```

After:
```
028 min R10, R11, zr #@minI_reg_zero_b
02c # pop frame 32
```