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Bug
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Resolution: Fixed
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P4
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21
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b09
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riscv
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linux
Issue | Fix Version | Assignee | Priority | Status | Resolution | Resolved In Build |
---|---|---|---|---|---|---|
JDK-8311750 | 17.0.9 | Fei Yang | P4 | Resolved | Fixed | b01 |
On RISC-V, several C2 instructions can use more accurate ins_pipe, eg.:
```
instruct regI_not_reg(iRegINoSp dst, iRegI src1, immI_M1 m1) %{
match(Set dst (XorI src1 m1));
ins_cost(ALU_COST);
format %{ "xori $dst, $src1, -1\t#@regI_not_reg" %}
ins_encode %{
__ xori(as_Register($dst$$reg), as_Register($src1$$reg), -1);
%}
ins_pipe(ialu_reg);
%}
```
We can use the more accurate pipe_class `ialu_reg_imm` instead of `ialu_reg`.
```
instruct regI_not_reg(iRegINoSp dst, iRegI src1, immI_M1 m1) %{
match(Set dst (XorI src1 m1));
ins_cost(ALU_COST);
format %{ "xori $dst, $src1, -1\t#@regI_not_reg" %}
ins_encode %{
__ xori(as_Register($dst$$reg), as_Register($src1$$reg), -1);
%}
ins_pipe(ialu_reg);
%}
```
We can use the more accurate pipe_class `ialu_reg_imm` instead of `ialu_reg`.
- backported by
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JDK-8311750 RISC-V: c2 fix pipeline class for several instructions
- Resolved
- links to
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Commit openjdk/jdk17u-dev/966fc82d
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Commit openjdk/jdk/8507db15
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Commit openjdk/riscv-port-jdk17u/7743fb84
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Review openjdk/jdk17u-dev/1427
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Review openjdk/jdk/12379
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Review openjdk/riscv-port-jdk17u/59
(2 links to)