The arraycopy stubs on AArch64 now allows the GC to vectorize arraycopy barriers. That's great! But the gct3 registers we hand to the GC is v8 today, which is callee saved (well at least the lower 64 bits). Therefore, if the GC clobbers this temp registers, it can have unexpected side effects on the caller float/double registers. We should use a caller saved register instead.
This is only used by generational ZGC, so isn't a mainline bug yet. We should fix it before it becomes one.
This is only used by generational ZGC, so isn't a mainline bug yet. We should fix it before it becomes one.