Details
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Bug
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Resolution: Fixed
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P4
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19, 20, 21
Backports
Issue | Fix Version | Assignee | Priority | Status | Resolution | Resolved In Build |
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JDK-8311762 | 17.0.9 | Fei Yang | P4 | Resolved | Fixed | b01 |
Description
The storeImmN0 matching rule as far as I know is from x86, which does not have a zero register. So it uses rheapbase as a zero register. The RISC-V backend ported this matching rule but did not specify the `CompressedOops::base() == NULL` predication so that under non-zero based compressed oops mode, the xheapbase can be a non-zero value and crashes the vm.
Reproduced by `<JDK>/bin/java -Xcomp -XX:HeapBaseMinAddress=72030M -version` simply. An hs_err file is attached below, triggered by `-XX:HeapBaseMinAddress=72030M` by using a springboot-helloworld program.
RISC-V also has a zero register x0, so we can use it to implement the matching rule.
Reproduced by `<JDK>/bin/java -Xcomp -XX:HeapBaseMinAddress=72030M -version` simply. An hs_err file is attached below, triggered by `-XX:HeapBaseMinAddress=72030M` by using a springboot-helloworld program.
RISC-V also has a zero register x0, so we can use it to implement the matching rule.
Attachments
Issue Links
- backported by
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JDK-8311762 RISC-V: Fix storeImmN0 matching rule by using zr register
- Resolved
- links to
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Commit openjdk/jdk17u-dev/966fc82d
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Commit openjdk/jdk/e32de7ef
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Commit openjdk/riscv-port-jdk17u/3a02888f
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Review openjdk/jdk17u-dev/1427
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Review openjdk/jdk/13577
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Review openjdk/riscv-port-jdk17u/51
(2 links to)