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Type:
Enhancement
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Resolution: Fixed
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Priority:
P4
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Affects Version/s: 21
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Component/s: hotspot
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b26
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riscv
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linux
We should add assembler functions for two pseudo-instructions vl1r.v [1] & vfabs.v [2] and use them when appropriate for better readability.
[1] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#79-vector-loadstore-whole-register-instructions
[2] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#1312-vector-floating-point-sign-injection-instructions
[1] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#79-vector-loadstore-whole-register-instructions
[2] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#1312-vector-floating-point-sign-injection-instructions
