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  1. JDK
  2. JDK-8311862

RISC-V: small improvements to shift immediate instructions

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    • b07
    • riscv
    • linux

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      Description

        We sometimes emit this code in risc-v backend:
        slli Rd, Rs, 0
        (for example we do this in String.IndexOf intrinsic)

        it's an equivalent of addi Rd, Rs, 0 ( a synonym for mv Rd, Rs)

        addi with 0 has higher chances to be just a register renaming in decoder and not utilise ALU.
        We observed some positive effect of replacing slli by 0 with addi on hifive.

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                vkempik Vladimir Kempik
                vkempik Vladimir Kempik
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