Remove unnecessary TEST instructions on x86 when flags reg will already be set

A DESCRIPTION OF THE PROBLEM :
HotSpot C2 currently sometimes emits TEST instrutions that operate on the result and of a AND, XOR or OR instruction and are their immediate successor.
This pattern can emerge if the result of the and is compared against two values where one of the values is zero. The matcher does not have the capability to know that the instruction mentioned above also set the flag register to the correct value.
According to https://www.felixcloutier.com/x86/and, https://www.felixcloutier.com/x86/xor, https://www.felixcloutier.com/x86/or and https://www.felixcloutier.com/x86/test the flags are set to same values for TEST, AND, XOR and OR, so this should be safe.
By adding peephole rules to remove the TEST instructions, the resulting assembly code can be shortend and a small speedup can be observed.
I've already created a PR for this: https://github.com/openjdk/jdk/pull/14172