RISC-V: improve MD5 intrinsic

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    • b24
    • riscv

        We can improve the MD5 intrinsic on RISC-V a bit more:

        * do the buffer loads more incrementally instead of all in one go
        * we don't have to mask off the top 32 bits of a register before an addw (and we don't need the mask32 register)

        The changes show a 1.5%-2% improvement on a VisionFive 2 board.

              Assignee:
              Tony Printezis
              Reporter:
              Tony Printezis
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