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Enhancement
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Resolution: Unresolved
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P5
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23
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riscv
Sha256 constant fit in vector registers, there fore we can remove a load on each quad.
Where or not this should be only multi-block or single pass also needs to be checked.
With VLEN 256 the 80 64-bit may also fit (for SHA512). (need 20 256-bit V regs)
Where or not this should be only multi-block or single pass also needs to be checked.
With VLEN 256 the 80 64-bit may also fit (for SHA512). (need 20 256-bit V regs)
- relates to
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JDK-8319716 RISC-V: Add SHA-2
- Resolved