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Bug
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Resolution: Fixed
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P4
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19, 20, 21, 22, 23
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b05
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riscv
The patch_vtype macro (assembler_riscv.hpp) contains a guarantee with the following test expression:
(vlmul | vsew | vta | vma == 0)
The error message for this guarantee is "the other bits in vtype shall be zero".
Because `==` has higher precedence than `|`, this is equivalent to
(vlmul | vsew | vta | (vma == 0))
But that doesn't test what the message indicates is being checked. The desired test is
((vlmul | vsew | vta | vma) == 0)
grouping all the bitwise-or's and comparing that result to 0.
The current code likely doesn't fail the guarantee more or less by accident, because all of the bits being tested _are_ zero. But if any other than vma were non-zero the test would still pass, even though it shouldn't.
(vlmul | vsew | vta | vma == 0)
The error message for this guarantee is "the other bits in vtype shall be zero".
Because `==` has higher precedence than `|`, this is equivalent to
(vlmul | vsew | vta | (vma == 0))
But that doesn't test what the message indicates is being checked. The desired test is
((vlmul | vsew | vta | vma) == 0)
grouping all the bitwise-or's and comparing that result to 0.
The current code likely doesn't fail the guarantee more or less by accident, because all of the bits being tested _are_ zero. But if any other than vma were non-zero the test would still pass, even though it shouldn't.
- blocks
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JDK-8322757 Enable -Wparentheses warnings
- Resolved
- relates to
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JDK-8322817 RISC-V: Eliminate -Wparentheses warnings in riscv code
- Resolved