- As per AVX-512 instruction format, a memory operand instruction can use compressed disp8*N encoding.
- For instructions which reads / writes entire vector from/to memory, scaling factor (N) computation only takes into account vector length and is not dependent on vector lane sizes.
- Fix incorrect lane size references from various x86 assembler routines, this is
not a function bug, but correcting the lane size will make the code compliant with AVX-512 instruction format specification.