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Bug
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Resolution: Fixed
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P4
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23
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b16
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riscv
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linux
Hi, The current behavior of C2_MacroAssembler::arrays_equals always load longword before comparison.
When array[0] is aligned to 32-bit (especially afterJDK-8139457 which tries to relax alignment
of array elements), the last longword load will exceed the array limit and may touch the next
word beyond object layout in heap memory. So this should bear a similar problem asJDK-8328138.
Proposed fix changes this behavior and aligns with handling in C2_MacroAssembler::string_equals,
which will check the number of remaining array elements before loading the next longword.
No obvious changes witnessed from the JMH numbers or benchmarks like SPECjbb2015.
Patch also removed the AvoidUnalignedAccesses check in C2_MacroAssembler::string_equals as we
don't see extra performance gain when setting AvoidUnalignedAccesses to false when testing the
JMH tests or benchmarks like SPECjbb2015 on three popular RISC-V hardware platforms. We can
consider adding it back if it turns out to be usefull on future new hardwares.
When array[0] is aligned to 32-bit (especially after
of array elements), the last longword load will exceed the array limit and may touch the next
word beyond object layout in heap memory. So this should bear a similar problem as
Proposed fix changes this behavior and aligns with handling in C2_MacroAssembler::string_equals,
which will check the number of remaining array elements before loading the next longword.
No obvious changes witnessed from the JMH numbers or benchmarks like SPECjbb2015.
Patch also removed the AvoidUnalignedAccesses check in C2_MacroAssembler::string_equals as we
don't see extra performance gain when setting AvoidUnalignedAccesses to false when testing the
JMH tests or benchmarks like SPECjbb2015 on three popular RISC-V hardware platforms. We can
consider adding it back if it turns out to be usefull on future new hardwares.
- relates to
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JDK-8347489 RISC-V: Misaligned memory access with COH
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- Resolved
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