-
Bug
-
Resolution: Fixed
-
P5
-
23
-
b20
-
riscv
Issue | Fix Version | Assignee | Priority | Status | Resolution | Resolved In Build |
---|---|---|---|---|---|---|
JDK-8331287 | 22.0.2 | Robbin Ehn | P5 | Resolved | Fixed | b05 |
JDK-8331288 | 21.0.4 | Robbin Ehn | P5 | Resolved | Fixed | b01 |
JDK-8331289 | 17.0.12 | Robbin Ehn | P5 | Resolved | Fixed | b01 |
As the second instruction have sign bit + 11 bits, the max of such pair is shorter.
Using runtime as it affect both runtime and compiler.
- backported by
-
JDK-8331287 RISC-V: Range check auipc + signed 12 imm instruction
- Resolved
-
JDK-8331288 RISC-V: Range check auipc + signed 12 imm instruction
- Resolved
-
JDK-8331289 RISC-V: Range check auipc + signed 12 imm instruction
- Resolved
- links to
-
Commit openjdk/jdk17u-dev/cb15a157
-
Commit openjdk/jdk21u-dev/a0e8de81
-
Commit openjdk/jdk22u/71d0fcff
-
Commit openjdk/jdk/8990864a
-
Review openjdk/jdk17u-dev/2422
-
Review openjdk/jdk21u-dev/516
-
Review openjdk/jdk22u/158
-
Review openjdk/jdk/18755