RISC-V: revisit masked version vector instructs

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      Some masked version vector instructs need to let dst and src share one register, so that for inactive elements, we can keep the origin value. Neither mu (undisturbed) or ma (agnostic) in vsetvl will do it.


      check too: https://github.com/openjdk/jdk/pull/19153#issuecomment-2102392793

            Assignee:
            Hamlin Li
            Reporter:
            Hamlin Li
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