- Support APX variant of SETcc, which supports zero-upper semantics (full register writer). Sets the destination operand to 0 or 1 depending on the settings of the status flags (CF, SF, OF, ZF, and PF) in the EFLAGS register. The destination operand points to a byte register or a byte in memory. The
condition code suffix (cc) indicates the condition being tested for. Additionally, if ND = 1 and the destination is a GPR, then also set the upper 56 bits of the GPR to 0.
- This saves emitting an explicit MOVZX instruction after setCC.
- These new instructions are encoded using 4 byte Extended EVEX encoding.