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Enhancement
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Resolution: Unresolved
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P4
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24
Currently, C2 cannot implement implicit null checks using memory accesses with late-expanded barriers [1], as in G1 and ZGC. This is due to three fundamental reasons:
1) implicit null check analysis rejects these accesses as candidates because they have MachTemp inputs (arising from ADL TEMP operands) typically preventing hoisting to the check block [2];
2) these ADL memory accesses are expanded into long sequences of machine instructions where the segmentation fault signal to be intercepted in the null case is not necessarily triggered by the first instruction (as currently assumed by PhaseOutput [3]); and
3) there might be several machine instructions expanded from a single ADL memory access that could potentially segfault (whereas the current PhaseOutput logic assumes a single exception point per ADL instruction).
This RFE proposes enabling implicit null checks using memory accesses with late-expanded barriers by overcoming the above limitations. This requires generalizing C2's implicit null check analysis to recognize and hoist MachTemp inputs together with the candidate memory access instruction, providing a mechanism to record actual PC offsets at code emission (within ADL's ins_encode blocks), and extending PhaseOutput to translate these PC offsets into implicit null exception table entries.
[1] https://github.com/openjdk/jdk/blob/75420e9314c54adc5b45f9b274a87af54dd6b5a8/src/hotspot/share/opto/lcm.cpp#L164-L170
[2] https://github.com/openjdk/jdk/blob/75420e9314c54adc5b45f9b274a87af54dd6b5a8/src/hotspot/share/opto/lcm.cpp#L316-L335
[3] https://github.com/openjdk/jdk/blob/75420e9314c54adc5b45f9b274a87af54dd6b5a8/src/hotspot/share/opto/output.cpp#L1615-L1618
1) implicit null check analysis rejects these accesses as candidates because they have MachTemp inputs (arising from ADL TEMP operands) typically preventing hoisting to the check block [2];
2) these ADL memory accesses are expanded into long sequences of machine instructions where the segmentation fault signal to be intercepted in the null case is not necessarily triggered by the first instruction (as currently assumed by PhaseOutput [3]); and
3) there might be several machine instructions expanded from a single ADL memory access that could potentially segfault (whereas the current PhaseOutput logic assumes a single exception point per ADL instruction).
This RFE proposes enabling implicit null checks using memory accesses with late-expanded barriers by overcoming the above limitations. This requires generalizing C2's implicit null check analysis to recognize and hoist MachTemp inputs together with the candidate memory access instruction, providing a mechanism to record actual PC offsets at code emission (within ADL's ins_encode blocks), and extending PhaseOutput to translate these PC offsets into implicit null exception table entries.
[1] https://github.com/openjdk/jdk/blob/75420e9314c54adc5b45f9b274a87af54dd6b5a8/src/hotspot/share/opto/lcm.cpp#L164-L170
[2] https://github.com/openjdk/jdk/blob/75420e9314c54adc5b45f9b274a87af54dd6b5a8/src/hotspot/share/opto/lcm.cpp#L316-L335
[3] https://github.com/openjdk/jdk/blob/75420e9314c54adc5b45f9b274a87af54dd6b5a8/src/hotspot/share/opto/output.cpp#L1615-L1618