Uploaded image for project: 'JDK'
  1. JDK
  2. JDK-8346235

RISC-V: Optimize bitwise AND with mask values

XMLWordPrintable

    • b03
    • riscv
    • linux

      This optimizes bitwise AND with immediate mask values like 0xFFFF and 0xFFFFFFFF.
      Currently, we do `andi` for these cases emitting 3 or 4 instructions repectively.
      These are effectively zero extensions and could be reduced to 1 or 2 instructions
      depending on whether Zba and Zbb extensions are available.

      This also renames existing assembler routines zero/sign_extend to z/sext. This
      will be compatible with the bit-manipulation spec which specifies names like sext.h
      and zext.h. The various callsites look better to me after the renaming.

            fyang Fei Yang
            fyang Fei Yang
            Votes:
            0 Vote for this issue
            Watchers:
            3 Start watching this issue

              Created:
              Updated:
              Resolved: