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  1. JDK
  2. JDK-8346475

RISC-V: Small improvement for MacroAssembler::ctzc_bit

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    • b03
    • riscv
    • linux

      When `step` is 16, the `andi` instruction in the loop performs a bitwise AND with immediate mask value 0xFFFF.
      This will emit 3 instructions. It's effectively a zero extension operation and could be reduced to 1 or 2
      instructions repectively depending on whether Zbb extension is available.

            fyang Fei Yang
            fyang Fei Yang
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