RISC-V: Cleanup bitwise AND assembler routines

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    • Type: Enhancement
    • Resolution: Fixed
    • Priority: P4
    • 25
    • Affects Version/s: 25
    • Component/s: hotspot
    • b06
    • riscv
    • linux

      It's a bit strange that we have `Assembler::_and_imm12` and `MacroAssembler::andi`. This is different from friends
      `Assembler::ori` and `Assembler::xori`. And it doesn't seem necessary to have this `MacroAssembler::andi` as I find
      the immediate is within 12-bit range for most of the cases. There is only one exception in file sharedRuntime_riscv.cpp
      where we can do `mv` and `andr` instead.

            Assignee:
            Fei Yang
            Reporter:
            Fei Yang
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              Created:
              Updated:
              Resolved: