Matcher::misaligned_vectors_ok should be changed to return true.
This will allow vectorization of adjacent memory accesses as part of the C2 SuperWord transformation (-XX:+UseSuperWord).

It is correct to do this change because C2 is restricted to VSX load/store instructions which support unaligned accesses.

Currently only lxvd2x and stxvd2x are used [2].
There are instructions that cannot handle arbitrary displacements (e.g. lxv) but even with these valid unaligned accesses can be produced if the base address is not aligned.

VSX is available since 2.06 which is implemented by POWER7 and later [3].
POWER7 is the oldest implementation supported by the PPC64 port (see JDK-8331859).

[1] Power ISA Version 3.1C
     https://en.wikipedia.org/wiki/Power_ISA#Power_ISA_v.3.1
[2] 7.6.2.1.2 VSX Vector Storage Access Instructions in [1]
[3] https://en.wikipedia.org/wiki/Power_ISA#Power_ISA_v.2.06